Flatten assign/update launch grids to remove the 65535 batch limit - #22
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andy-yang-1 merged 3 commits intoAug 4, 2026
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The assign (euclid/cosine, non-split) and shared _centroid_update_chunk_kernel used a 2D launch grid (n_tiles, B) with the batch dimension on grid.y, which CUDA caps at 65535. Any problem with B > 65535 fails to launch with 'CUDA: invalid argument'. Flatten to a 1D grid (B * n_tiles,) and decode program_id(0) as b = flat_id // n_tiles, tile = flat_id % n_tiles. grid.x is capped at 2^31-1, so both large-B and large-N launch. The block->(b,tile) linearization is unchanged, so per-program work and atomic contention are identical. Split-D assign kernels keep their 2D launch (they decode a 2D grid). benchmarks/grid_fix/ adds: - bench_grid.py: before/after throughput on the non-split assign + update paths (run on main and this branch, then --compare). - bench_large_b.py: capability check that B > 65535 launches.
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@zeyuyang8 Thanks for your contribution! Can you also fix the split-D path? I can merge it once split-D is fixed |
The split-D assign kernels (euclid/cosine) still launched a 2D grid (n_tiles, B) with the batch dimension on grid.y, which CUDA caps at 65535 -- so B > 65535 failed with 'CUDA: invalid argument' exactly like the non-split kernels did before the earlier flatten. Flatten them to the same 1D grid (B * n_tiles,) and decode program_id(0) as b = flat_id // n_tiles, tile = flat_id % n_tiles. The block->(b, tile) linearization is identical to the old 2D grid (CUDA enumerates grid.x fastest), so per-program work and atomic contention are unchanged. bench_large_b.py now also exercises the split-D path (D=768 > 512) at B=70000, and computes x_sq without a full fp32 copy so the large-B case fits a shared GPU.
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Thanks @andy-yang-1! Done — the split-D assign kernels (euclid + cosine) now decode the same flattened 1D grid Verified on H100:
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@zeyuyang8 Great work! |
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Summary
Splits the flattened-launch-grid fix out of #21 into its own PR, since it touches the shared assign/update paths that all current users hit (as suggested by @andy-yang-1).
The non-split assign kernels (
euclid/cosine) and the shared_centroid_update_chunk_kernellaunched a 2D grid(n_tiles, B)with the batch dimension ongrid.y, which CUDA caps at 65535. Any problem withB > 65535fails to launch withTriton Error [CUDA]: invalid argument.This flattens them to a 1D grid
(B * n_tiles,)and decodesprogram_id(0)asb = flat_id // n_tiles,tile = flat_id % n_tiles.grid.xis capped at2^31-1, so both large-Band large-Nlaunch. The block→(b, tile)linearization is identical to the old 2D grid (CUDA enumeratesgrid.xfastest), so per-program work and atomic contention are unchanged.The split-D assign kernels decode a 2D grid and keep their 2D launch — this change only touches the non-split kernels.
Benchmarks (H100 80GB, fp16)
benchmarks/grid_fix/is included so this is reproducible.No throughput regression on the non-split paths —
AFTER/BEFORElatency ratio (mainvs this branch),< 1.0= faster:Worst case 1.02x, within run-to-run noise.
Capability (
bench_large_b.py,B=70000 > 65535):mainHow to reproduce
git checkout main python benchmarks/grid_fix/bench_grid.py --out /tmp/grid_main.json git checkout fix/flattened-launch-grid python benchmarks/grid_fix/bench_grid.py --out /tmp/grid_fix.json python benchmarks/grid_fix/bench_grid.py --compare /tmp/grid_main.json /tmp/grid_fix.json python benchmarks/grid_fix/bench_large_b.py # run on both branchesNumbers above are on an H100; the same scripts will produce H200 numbers if you'd like to confirm on that arch.